Aug 6, 2008 #1 V vijaymails Newbie level 6 Joined Mar 9, 2007 Messages 11 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,346 verification openings Presently we have openings for ASIC verification engineer Job Description Skills Experience with verification methodologie using HVLs(Specman). Minimum 2 years experience spanning all aspects of VLSI/ASIC Design using RTL methodology Atleast 1 of the most recent years in leadership role in verificationof a SOC level multi-million gate ASIC for networking/telecom area. Send your resumes immediatly to vijay at c2csemi.com Regards Vijay
verification openings Presently we have openings for ASIC verification engineer Job Description Skills Experience with verification methodologie using HVLs(Specman). Minimum 2 years experience spanning all aspects of VLSI/ASIC Design using RTL methodology Atleast 1 of the most recent years in leadership role in verificationof a SOC level multi-million gate ASIC for networking/telecom area. Send your resumes immediatly to vijay at c2csemi.com Regards Vijay