Off the chip Voltage Reference!

[chandra3789]

hi members.....
i designed a 10 bit pipelined ADC which is working at 100 MSPS. I am actually planning for a tape out. For the ADC i need a differential reference voltage. It has to be very precise. I tried to design an on chip band gap reference circuit. The reference voltage generation is done but when i connect it to the ADC through a buffer it is experiencing severe changes. I tried a lot to minimize them but could not do it. So now my question is whether i can give the reference voltage off the chip?....will there be any problem if i do so?...please help me......

 

[milind.a.kulkarni]

Hi Chandra,

Basically the band gap voltage of ADC's ranges from 1.2 volts to 0.7 volts ( internal reference) and expect the ADC to have analog voltage to be in the same range.....so if you need the analog voltage range to be more than the band gap voltage....you need to use external reference.....it is the fact that ADC resolution accuracy may get affected if your referece voltage changes from the VCC ( in some cases )....need to read the data sheet for that.....If the ADC that you are using is succesive approximation ( R-R ladder ) type....the accuracy of detection mostly dose not changes with the external reference voltage....another point is your reference volage must be noise free to get accurate detection....so either put 10uf capacitor at reference pin with if possible with a ziner diode....

 

[chandra3789]

Actually i need two reference voltages of 0.5 volts and 1.3 volts with a common mode voltage of 0.9 volts for a 1.8V supply .....will the reference i take off the chip be noisy?....are there any instances where reference voltages are taken off chip?

 

[milind.a.kulkarni]

Yes, Just refer two links as bellow

**broken link removed**
**broken link removed**

May be helpful to you to use your external references

with regards,
Milind