Scan chains connect all state elements (flip-flops) of a design into one, or multiple shift registers chain that helps in fault-test coverage.
Can you think of some situations where a designer may allow non-scan flip flop in the design? The question pertains to Partial Scan and Non-scan designs.
So I take that you don't think there is ever a situation when a designer can or should allow non-scan flops in the design?
If its fault coverage at question, then it must be highly risky to allow non-observable and non-controllable flops. Then why ever they allow it on the chip?