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# Non Linearity of Boost Converter Output Against Duty Cycle

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#### mengghee

##### Full Member level 3
I have plotted a graph of Duty Ratio against Vout of a boost converter from simulation results. I am just wondering why the non linearity ?what causes the non linearity ? and How can I improve the linearity at a range of duty cycle ie. 0.3 to 0.7 ? thank you very much.

Re: Non Linearity of Boost Converter Output Against Duty Rat

I don't quite know ur meaning. Pls upload simulation waves!

Re: Non Linearity of Boost Converter Output Against Duty Cyc

Sorry for the unclear question. have a look at the graph plotted. I was just wondering which range of duty cycle is the most linear in the graph. and i am also wondering if the linearity can be improved which i doubt. thank you. hope it is clearer

This nonlinearity may arise from power loss because of circuits constrains.
I think you must prevent this condition (DC < 0.85).
what is you circuit diagram?

### mengghee

Points: 2
Re: Non Linearity of Boost Converter Output Against Duty Cyc

I have attached my circuit diagram. can you be more specific on power loss ? thank you very much

In 1st half cycle transistor M1 turn on and current in coil L1 increase [from zero].
In 2nd half cycle transistor turn off and coil deliver its energy to C1,R8 through D2.
note:
if 2nd cycle is too short (or output-input voltage diffrence is small) which coil current donot reach to zerro, coil going to saturation.
because in second cycle coil current start from some initial current , insted of zero, and this condition is harder for 3rd, 4th,...
in this condition if we assume coil is ideal and not saturate, transistor current increase in each cycle and we have power loss in transistor.

for prove, you can check coil current from 1st cycle.

Regards
داود عامریون

### mengghee

Points: 2
Re: Non Linearity of Boost Converter Output Against Duty Cyc

thank you for such a detailed explanation. does anybody know which duty cycle range is the most linear and .... i have simulated my boost and i plot a graph of duty cycle vs vout. in my graph, i noticed that there is a problem. when my duty cycle goes greater than 0.9, the output voltage is lower than the output voltage when my duty cycle is 0.8. hope u all understand and i will attached a jpeg file of my graph ... thank you very much

Re: Non Linearity of Boost Converter Output Against Duty Cyc

mengghee said:
thank you for such a detailed explanation. does anybody know which duty cycle range is the most linear and .... i have simulated my boost and i plot a graph of duty cycle vs vout. in my graph, i noticed that there is a problem. when my duty cycle goes greater than 0.9, the output voltage is lower than the output voltage when my duty cycle is 0.8. hope u all understand and i will attached a jpeg file of my graph ... thank you very much

It is because your have fixed resistive load. Higher duty ratio leads to higher switch/diode current and therefore larger conduction loss. Limitation in maximum output voltage always exists for pratical design. You should first define the worst loading condition, switch frequency and required max output voltage, then optimize the switch/diode size (large switch, small conduction loss but large switching loss). It is possible to improve the duty cycle range to >0.95 but surely no one can make good power conversion efficiency for the whole duty cycle range (0-100%)

### mengghee

Points: 2
Re: Non Linearity of Boost Converter Output Against Duty Cyc

Hylas,

i dont understand when u said define the worst loading condition and also optimize the switch. if it's not to troublesome for you, can you explain it to me ?

Re: Non Linearity of Boost Converter Output Against Duty Cyc

mengghee said:
Hylas,

i dont understand when u said define the worst loading condition and also optimize the switch. if it's not to troublesome for you, can you explain it to me ?

The worst loading condition is the highest loading current that your application required. For fixed frequency PWM control converter, power loss in the converter is the sum of switching loss and conduction loss. At low loading current, power loss is dominated by switching loss, but in heavy load condition, conduction loss is critical.

Large power switch/diode gives you better heavy load efficiency, but also hurts low load efficiency due to the large gate capacitance. Similarly, higher switching freq. -> smaller ripple current -> lower conduction loss, but switching loss increase at the same time. That’s why the size of the switches as well as the switching frequency are important in optimizing the power conversion efficiency.

Points: 2