no tr0 file generated

** Design cell name: inverter
** Design view name: schematic
.GLOBAL vdd!
.include "/home/students/mhkvy4/ams_install/hspiceS/c35/profile.opt"


.OP

.TEMP 25.0
.OPTION
+    ABSMOS=1e-9
+    ABSVDC=1e-6
+    ABSV=1e-6
+    ARTIST=2
+    CHGTOL=1e-14
+    DEFAD=5.29e-12
+    DEFAS=5.29e-12
+    DEFNRD=0.1
+    DEFNRS=0.1
+    DEFPD=9.2e-06
+    DEFPS=9.2e-06
+    INGOLD=2
+    LVLTIM=2
+    METHOD=GEAR
+    NOMOD
+    OPTS
+    PARHIER=LOCAL
+    PSF=2
+    RELI=1e-3
+    RELMOS=1e-3
+    TNOM=27


.LIB "/home/students/mhkvy4/ams_install/hspiceS/c35/cmos49.lib" cmostm
.LIB "/home/students/mhkvy4/ams_install/hspiceS/c35/res.lib" restm
.LIB "/home/students/mhkvy4/ams_install/hspiceS/c35/cap.lib" captm
.LIB "/home/students/mhkvy4/ams_install/hspiceS/c35/bip.lib" biptm
.LIB "/home/students/mhkvy4/ams_install/hspiceS/c35/esddiode.lib" esddiodetm

** Library name: test
** Cell name: inverter
** View name: schematic
mp0 out in vdd! vdd! modp L=350e-9 W=10e-6 AD=11e-12 AS=11e-12 PD=12.2e-6 PS=12.2e-6 NRD=60e-3 NRS=60e-3 M=1
mn0 out in 0 0 modn L=350e-9 W=10e-6 AD=11e-12 AS=11e-12 PD=12.2e-6 PS=12.2e-6 NRD=60e-3 NRS=60e-3 M=1
v0 vdd! 0 DC=5
v1 in 0 PULSE 0 5 20e-9 100e-12 100e-12 20e-9 40e-9
.tran 20n 200n
.END