deveshkm
Member level 4
Hi,
I am designing NMOS input folded cascode DDA.
Specification:
Gain : 60dB
UGB: 1MHz
Capacitive Load: 10pF
Input and Output Common Mode Level = 900mV
Current through folding transistors (PMOS) M50 and M59 : 30uA
Tail Current through M80-81 and M82-83 : 20uA
********************
Obtained Results:
Gain : 55dB
UGB : 1.59kHz
In order to bias it, I had chosen following W/L ratios:
PMOS Folding Transistors (M50 and M59) = 14.5u/1u
PMOS (M47 and M48) = 9u/1u
I observed that parasitic capacitances of these 4 transistors are of the order of nanoFarad ( 1E-09 F)
How can I improve the UGB?
I am designing NMOS input folded cascode DDA.
Specification:
Gain : 60dB
UGB: 1MHz
Capacitive Load: 10pF
Input and Output Common Mode Level = 900mV
Current through folding transistors (PMOS) M50 and M59 : 30uA
Tail Current through M80-81 and M82-83 : 20uA
********************
Obtained Results:
Gain : 55dB
UGB : 1.59kHz
In order to bias it, I had chosen following W/L ratios:
PMOS Folding Transistors (M50 and M59) = 14.5u/1u
PMOS (M47 and M48) = 9u/1u
I observed that parasitic capacitances of these 4 transistors are of the order of nanoFarad ( 1E-09 F)
How can I improve the UGB?