I am working on intrusion detection subsystem and very new to this accelerator to be implemented in FPGA . can anyone help me in getting free cores available or any implementation materials . I am looking into more details of packet classification , bloom filters - how they are implemented FPGA
If you are working on this , please do let me know . We budget as we go .
i want to add an accelerator to my bloc.I'm working with JPEG2000,which i want to add accelerator to ameliorate its fonctionalities.
My FPGA is cycloneIII(EP3C25).
I dont know how to do exactly.
THinks for your reply.:|