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new to HDL and I want a tool to convert FSM to Verilog or VHDL

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zaid1975

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Hi Folks

I am new to this forum and also new to the HDL world, I'll put my query in easy form I have a program that generate a sort of FSM but with some additional feature like on the transitions I allows to have a set of inputs/outputs and it is non deterministic (i.e it may have the same transtion goes from the same state to different states), and I am die to find a too that convert this FSM to behavioral Verilog or even VHDL.

Any suggestions or notes are more than welcomed.

Cheers,
Zaid
 

sns22

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Use case statement with if else.Case statement to determine the FSM states and if else to switch between states.Any VHDL book can guide you.I recommend VHDL by Ashendan(not sure of spelling)
 

zaid1975

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Use case statement with if else.Case statement to determine the FSM states and if else to switch between states.Any VHDL book can guide you.I recommend VHDL by Ashendan(not sure of spelling)

Thanks for your reply but do you think there is no problem regarding multiple I/O on the same transition as those I/O are considered to by synchronous (within the same clock cycle).

cheers
 

sam33r

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It is on you to keep the multiple I/P and O/P to be synchronous or asynchronous.
In verilog for eg

always@(posedge clk)
current_state<= next_state;

This will make it synchronous since you have written everything under posedge.

If you have multiple I/p o/p make sure you include all the conditions in the case statement and a default statement also. This will help you to prevent building of unintentional latches.
 

vlsi_whiz

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If you're looking for a tool that converts FSMs to Verilog/VHDL, you can try the StateCAD tool. It used to be bundled along with Xilinx ISE 8/9 versions, but has been dropped from the latest versions. You could try googling for StateCAD and see if you get to download the older versions. It's a pretty good tool for FSMs can give output in both VHDL and Verilog and has some optimization techniques as well as FSM styles.
 

zaid1975

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Thanks for all your replies. I had a look on the STATECAD but I am not sure if it accepts multiple I/O on the same transition, and also it seems that you have to draw the FSM so there is no option of reading the FSM as DOT file or any other extension.

Cheers
 

FvM

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It's the first time that you mention DOT file format in your post. Do you think, that there's a clear unequivocal representation of FSM in a DOT description?

Classical FSM schemes are assuming that the output can be completely decoded from states. Setting output on transitions (and keeping them across states, if the feature should have any significance) involves additional registers or latches. As a result, the overall system has more states than the FSM state enumeration shows, which is usually unwanted in the FSM way of thinking. Strictly spoken, it implies a step towards multiple coupled FSMs.
 

zaid1975

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Thanks again for your replies
I will my example here and I appreciate your suggestions.

1. there are 4 states (1,2,3,4)
2. two inputs (R, Dx).
3. two outputs (D, Rx).
4. the transitions are as follows:
1 -> 2 : R,Rx
2 -> 3 : Dx
1 -> 3 : R Rx Dx
3 -> 4 : Rx
3 -> 1 : Rx Dx D
4 -> 1 : Dx D

again all the input/output that appear on the same transitions are supposed to be synchronous (within one clock cycle).

I look forward to your suggestions.

Cheers
 

FvM

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The meaning of the input/output syntax isn't obvious to me.
 

zaid1975

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The meaning of the input/output syntax isn't obvious to me.

means that there are some input and/or output events have to be happened in order to move to the next state, as in my example you will move from state1 to the next state (state2) if you have active input "R " and active output "Rx".

Cheers
 

FvM

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Assigning input an trigger to transitions isn't the problem, but how do define the output? Do you mean, that the active output is assigned to the target state rather than the transistion?
 

zaid1975

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Well the output is related to the transition but those events (R, Rx) has both to be active to have the move from state 1 to state2.
 

FvM

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Well the output is related to the transition but those events (R, Rx) has both to be active to have the move from state 1 to state2.
Sorry, it's still unclear. You say, the FSM output serves as a condition for the transition. But how is this output generated? Does it depend on states only (Moore FSM), states and inputs (Mealy FSM) or does it hold additional state information?

I also thought, the diagram shows how outputs are generated. If so, the respective syntax isn't clear.
 

zaid1975

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thanks for your reply. Now let us return to my previous example:
1. there are 4 states (1,2,3,4)
2. two inputs (R, Dx).
3. two outputs (D, Rx).
4. the transitions are as follows:
1 -> 2 : R,Rx
2 -> 3 : Dx
1 -> 3 : R Rx Dx
3 -> 4 : Rx
3 -> 1 : Rx Dx D
4 -> 1 : Dx D

I have two questions now
1. how I resolve the situation of 3 -> 4 as there is an output but no input what you suggest here for the condition of "if" and t
2. he other issue is 2->3 as there is input but no output.

Cheers,
 

FvM

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I previously mentioned, that I partly don't understand the "language" of your FSM description. Now I'm under the impression, that you understand it neither.
 

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