need some explanation about spi

[Ram Prasadh]

I need to know in-depth about the WCOL and SSPOV bits in the SSPCON register.
I wanted to know when to use these two ,when when transmitting and receiving.. I am using a PIC16F72

 

[horace1]

have a look at Microchip's SPI tutorial
https://ww1.microchip.com/downloads/en/devicedoc/spi.pdf

 

[Ram Prasadh]

I looked into that ... A normal communication takes place if you follow that pdf. I tried it between two pics ,ie 1 pic used only for transmitting and the other only for receiving.Its working fine.but if you want to both trans and receive , that pdf is not sufficient.we need to use the wcol and the sspov bits to use.But i don know in which place I have to use it. do you know about where to use these bits?

 

[ckshivaram]

dont or never learn any protocol with respect to any controller.....

learn the protocol first and then read the registers of the controllers, and understand how they work and how to use it.. you cant learn a protocol in depth just by learning the registers of one specific controller....

 

[Ram Prasadh]

I am not asking this without learning anything.I know this protocol clearly.Each and every bit in a register associated to spi in any controller will affect in one or the other way ,the mode of communication.For a very basic SPI communication between two pics,it is enough to make use of only some bits in a register .That may not be the case when I communicate with a pic and an other controller. Any data coming from the slave(maxq3180),I am not able to get in the master(pic16f72). Yhats why I wanted to ask about he usage of WCOL and SSPOV bits in pic.

 

[btbass]

The WCOL bit is set if there is a write collision, I think this is only when using I2C protocol.

From Data sheet:

In SPI mode.

The SSPOV bit is set if a new byte is received while SSPBUF holds previous data.
Data in SSPSR is lost on overflow. In Slave mode, the user must read the SSPBUF, even if only transmitting data, to avoid overflows. In Master mode, the overflow bit is not set, since each operation is initiated by writing to the SSPBUF register.
(Must be cleared in software.)