Sir
I am a B tech student and my final year project is "MOVING MESSAGE DISPLAY IMPLEMENTED IN FPGA KIT IN VHDL LANGUAGE ".
A code in vhdl language will be required for moving message .
So please sir if u can help me out or give some important information
my email id is
avin.india(at)gmail.com
first u need to use a counter to down the frequency fron FPGA to 1hz.after that use a counter to generate the sequences like alphabets in our lab we did for "CVR CE VLSI"
so we have given counter output 1 as C,2 as V
like that we have coded.and then use one shift register to syncronize ...