Need Help with SDRAM Addressing

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rish_jain

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sdram addressing

I want to design a sdram controller using an FPGA but I do not understand how the linear address from a microcontroller can be translated to the 2 stage address used by the SDRAMs. Any reference/description regarding this will be great!

Thx in advance.
 

the easiest way is to use the upper addresses for bank addreses + row addreses, and the lower for cas addresses.
you shoud know in advanced how many address lines you are using and how many column addredd lines are being used by your SDRAM.
 

**broken link removed**

and run search on SDRAM
 

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