spartan3e ddr
The Spartan-3 FPGA does not have DDR built-into it.. If you're referring to the DDR memory on the Dev board, you can use a DDR SDRAM controller module in the FPGA to interface it to the DDR memory.
You can either design this controller yourself or use the Megafunction wizard to generate the IP and instantiate it into your design. Either way, you will have to pay close attention to the memory timings and make sure you match them..else it will not work and you will not be able to perform reads/writes reliably.
Typical DRAM parameters are CL (CAS Latency), Access Times (Read/Write/Random,Seq), DRAM commands, initialization sequences, read/write/burst sequences, Burst length,etc.. You can get all these parameters from the DRAM data sheet (the one used on the board,ex Micron).