need help SPARTAN 3E's DDR SDRAM

[quer]

spartan 3e ddr

how can i use the SPARTAN 3E's 64 MByte (512 Mbit) of DDR SDRAM, x16 data interface, 100+ MHz as data storage.

 

[vlsi_whiz]

spartan3e ddr

The Spartan-3 FPGA does not have DDR built-into it.. If you're referring to the DDR memory on the Dev board, you can use a DDR SDRAM controller module in the FPGA to interface it to the DDR memory.

You can either design this controller yourself or use the Megafunction wizard to generate the IP and instantiate it into your design. Either way, you will have to pay close attention to the memory timings and make sure you match them..else it will not work and you will not be able to perform reads/writes reliably.

Typical DRAM parameters are CL (CAS Latency), Access Times (Read/Write/Random,Seq), DRAM commands, initialization sequences, read/write/burst sequences, Burst length,etc.. You can get all these parameters from the DRAM data sheet (the one used on the board,ex Micron).

 

[quer]

spartan 3e ddr controller

thank you sir... can you help me help me how to do that. im just starting with this Spartan 3E board... i am working on an undergrad design and my problem is how to store the binary equivalents of a wave file in the DDR memory... can you help me with this please...

 

[vlsi_whiz]

spartan 3e sdram

Can you tell me what Spartan-3 Kit you are using. If you could give me the model number of the kit, I could help you better.

 

[vlsi_whiz]

spartan 3 fpga ddr

Xilinx provides the Memory Interface Generator (MIG) software tool to create external memory controllers and interfaces. This tool comes built-into the ISE Foundation software.

You can use this tool to generate a DDR SDRAM controller targetted for the DDR memory chip on the board. Once you generate this controller IP.. instantiate it (call it) in your main code and map it to the main ports which are connected to the DDR chip. You can get the pin-outs and pin-info u need from the boards manual. Use this info to create the UCF file with pin assignments and then compile the entire design. When you download and run the code from the FPGA you will be able to access the DDR memory.

Check out Xilinx ISE manuals and App notes on the website for more info.

 

[quer]

mig spartan 3e board

good day sir! we using the Spartan 3E starter board. this is the only FPGA board available in our school. can you give us your email address sir so that we can send you a sample copy of our project proposal. we would be very thankful to you sir if you will going to help us. GodBless! :|