Need explanation of pulse train generator design

[no_mad]

pulse train generator

Hi all,

I need some help or a hint on a “pulse train generator with adjustable width pulse” design. Digital design is still new field for me.

Please enlighten me.

Thanx in advance,
no_mad

 

[masai_mara]

Re: pulse train generator

hi,
You can generate a variable width pulse train as follows: In your design
define a counter which can hold a value >= max value of pulse width required in clock cycles. then declare a register which stores the value of the reqd pulse width in clock cycles. Then write the logic so that the counter while counting is reset whenever its value is equal to the value in the pulse-width register. finally toggle your output when the counter value is equal to zero each time. The output pulse width will now be whatever value you have set in the register. you can change the width of the output pulse by loading a new value in that register.
hope this helps.

 

[no_mad]

pulse train generator

hey, thanx for ur reply and the suggestion...

The thing is I have a condition where the pulse pattern need to set either 1 or 0.

So, I was thinking to use parallel to serial (p2s) conv and to control the width I use a counter output as a clock to this p2s.
Ex, ___ ___
101 --> __| |___| |___
___
001 --> _________| |___
(basically, it can control the number of pulses and pulse width)

what do u think bout this design (after synthesis)??

Thanx in advance