Trying to build a class D audio amplifier. Target specs are:
(1) 3V power supply,
(2) 20KHz signal bandwidth,
(3) 16Ohm AC load,
(4) Peak swing 2Vpp,
(5)<1% THD,
(6) Dynamic range > 80dB
Need some design advice or references.
(lease skip applicaion-notes web-sites like TI or ADI...)
Or please give me link in case this has been covered bofore on this board,
Thanks in advance,
Checked with system guy, and
I have corrected the output bandwidth to 20KHz.
Considering implementing such audio output device onto our chip,
where left half circuits looks like familiar DC/DC circuit blocks (?),
But what is the art of right half circuits (namely, de-glitch, gate-drive, power N/PMOS)
... they just appear to be too simple??? Coud we implement this half
by standard CMOS logic cell library provided sufficient power handling capability???