My First FPGA Design

[rowan.bradley]

I have an existing system based on an 8051 family microprocessor (actually an 80C320). I want to add some dual port memory which can be accessed by the existing 80C320 processor, and also by a new processor (probably an ARM) without interrupting or interfering with each other. I figure the best way to do this is maybe with an FPGA, but I have never designed anything with an FPGA. I think I could design a system using TTL logic to do the job (basically by interleaving the 80C320's read/write cycles with the ARM's cycles, requiring both to be completed within the time of a single 80C320 cycle. This should enable the ARM to read and write to the memory without changing the speed of the 80C320 at all). This should be possible because the 80C320 only runs with a 12MHz clock, and 4 clocks per cycle, so 1/3 uS per cycle. That seems plenty of time to complete two memory cycles using a modern static RAM.

My question is, how do I get started? How do I choose which FPGA family to use? How do I set about my design? What do I need to read? Are there any example projects doing things similar to this that I can learn from?

Thanks for your help - Rowan

 

[FvM]

Do you know that dedicated dual port memory devices are made by vendors like IDT. So you possibly don't need design your own interconnect device.

If the available devices don't fulfill your requirements, you'll start by defining interface and function in detail, sketch a hardware scheme, estimate the logic cell demand and choose a suitable FPGA family.

 

[rowan.bradley]

Thanks for this suggestion. I have looked at this device, and yes, I think one of these possibly will do what I need, and avoid the need for an FPGA (slight disappointment at not being able to get to grips with FPGAs, but it will make my current project much faster). I had looked for dual port SRAMs before and not found this one, so thank you.

Rowan