Mux and ROM Implementation Problem

[Mina Magdy]

Hi I try to implement a MIPS controller using Verilog
i have a problem in the implementation ISE implement this code as a ROM

assign RegDst =    (op == 6'b000000)? 2'b01 : // R-Type
		         (op == 6'b001111)? 2'b00 : // LUI
		         (op == 6'b001000)? 2'b00 : // ADDI
			 (op == 6'b001010)? 2'b00 : // SLI
			 (op == 6'b001100)? 2'b00 : // ANDI
			 (op == 6'b001101)? 2'b00 : // ORI
			 (op == 6'b001110)? 2'b00 : // XORI
			 (op == 6'b100011)? 2'b00 : // LW
			 (op == 6'b101011)? 2'b00 : // SW
			 (op == 6'b000010)? 2'b00 : // J
			 (op == 6'b000001)? 2'b00 : // BLTZ
			 (op == 6'b000100)? 2'b00 : // BEQZ
			 (op == 6'b000101)? 2'b00 : // BNEZ
			 (op == 6'b000011)? 2'b10 : // JAL
				 2'b00;

but i need to implement as a 2 of 64 X 1 Mux
can any one help

 

[ads-ee]

a mux selecting only constants (your 2-bit value assigned to RegDst) is a ROM.