Is it possible to multiply a negative number with a fraction in verilog? Eg :- -1*0.1;
If yes how can it be done? What is the format in which the result is stored?
TIA
You can do everything in verilog! Everything! But you could check out myhdl, which should be able to do what you want. Myhdl generates a verilog file which you could use to learn how to do this in verilog. Also, check out migen.
There's no generic format for fractional numbers in Verilog. You have to specify a suitable format according to your requirements. Binary fixed point is the usual choice. It involves a rounding error when representing decimal fixed point numbers, but it's effective and fully compatible with signed and unsigned binary integer format.