multiplier verfication

[sun_ray]

I have a two input multiplier with each input being 8 bits wide. Is there any simpler way to verify this multiplier other than sending and the possible combinations at the input?

 

[rca]

At which level you want verify your multiplier?
1-rtl, no need.
2-logic, LEC is required.
3- silicium, the scan pattern will check the majority but the guarantee the correct coverage, you need to try all cases.

 

[sun_ray]

I am looking for a solution where you take a methodology that will lead to a smarter way of verification. The multiplier can be at RTL level and also at gate level.

 

[rca]

At rtl level, there is nothing to check for a multiplier itself.
At gate level, only executed all multiplication will guarantee the full functionality.

 

[sun_ray]

I am asking a smarter solution?

 

[osm3000]

What do you mean by a smarter solution ? Can you explain more your intentions and what's in your mind ?