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Multiple timer overflow interrupt

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Jack// ani

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Hi,

Can PIC uC handle....simultaneous mutiple timer overflow interrupt, if yes, how it is handled??

Thanks
 

Gomez

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Maybe the new PICs are a bit different but for old PICs the docu says:

"When an interrupt is responded to, the GIE bit is
cleared to disable any further interrupt, the return
address is pushed onto the stack and the PC is loaded
with 0004h. Once in the Interrupt Service Routine, the
source(s) of the interrupt can be determined by polling
the interrupt flag bits. The interrupt flag bit(s) must be
cleared in software before re-enabling interrupts to
avoid recursive interrupts."

and next:

"The “return from interrupt” instruction, RETFIE, exits
the interrupt routine, as well as sets the GIE bit, which
re-enables interrupts."

You can't get multiple interrupt because the global interrupt enable bit is cleared.

Gomez
 

Davood Amerion

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No because microcontroller have one cpu!
interrupt handeling accomplished depend on it's priorty, one at a time!
 

Sceadwian

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Two different timers should never overflow at the same time anyways, otherwise you should be using one timer to do both jobs.
 

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