sudheerprasad
Member level 2
hi all,
i have two cell libraries one characterized at 1.8v ,a nd the other at .4v.
i want to use them in multi vdd design technique.how i can i use two libraries at a time,should i do any changes in the RTL verilog code??
where should i specify that a block operates at a particular voltage,
if any body have tutorials or stuff related multi vdd techniques plz post them
thanx
sudheer
i have two cell libraries one characterized at 1.8v ,a nd the other at .4v.
i want to use them in multi vdd design technique.how i can i use two libraries at a time,should i do any changes in the RTL verilog code??
where should i specify that a block operates at a particular voltage,
if any body have tutorials or stuff related multi vdd techniques plz post them
thanx
sudheer