[Moved] what is bit- true implementation

[preethi19]

can anyone please tell me what is bit true implementation mean with an example if possible. i read in one paper where bit true implementation of the algorithm on FPGA was performed. What is bit true and how is it implemented using an FPGA. pls help

 

[TrickyDicky]

Bit true modelling would be creating a model of a system that used the same number system for all of the results. So on an FPGA, where integer mathematics is prefered, all arithmatic would be using fixed point. The model (in matlab for example) would also use fixed point to the same precision as would be used on the target device.

Bit true models allow designers to compare the results from a model directly to their implementation. All rounding errors or truncation should also occur in the model too. The origional behavioural model may be in floating point to improve speed or accuracy, or make the model simpler, but this cannot be directly compared to the final result.

 

[preethi19]

So like i understand before implementing any system we build a model for it and this model is bit true model. but say if we want to implement it on an FPGA how do we implement that model and in your answer you mentioned a model in matlab. So how can a model build in matlab be verified on an FPGA. so if we want to build a model which can be verified using a FPGA how can be build the model. Do we build it with verilog or VHDL code???? And if bit true model is the case for digital design then wat kind of modelling do we do for mixed signal design???

Also i dont get the part of fixed point. If integer arthmetic is used in FPGA then how fixed point is used. isnt integer arthmetic without decimal point whereas a fixed point has a fixed digits after decimal point so how is fixed point used in FPGA.
sorry if i am wrong but pls help

 

[TrickyDicky]

A model is just a model - it doesnt matter how you implement it. If it is bit-true to can treat it as a black box - so you put the same data through your model and FPGA code and you should get identical results.

The FPGA code needs to be written in VHDL or verilog. Either hand written or generated. Simulink has an HDL coder addon that can take a subset of simulink blocks and matlab code to convert to HDL. You can then easily compare the whole system inside simulink, including Modelsim co-simulation with the generated HDL and even Hardware in the loop tests, all controlled from simulink.

Fixed point is just integer arithmatic with a 2^n offset.

 

[mrflibble]

Regarding bit true simulation using matlab: is there an "easy" way to model fixed point multiplication that will work transparantly with existing toolkits? Case in point: I recently used the Delta Sigma Toolbox (delsig), and it would be nice if you could run the simulation with fixed point multiply accumulate. And same question for saturating arithmetic.

Right now it was easier to get the answer by simulating in systemverilog, but for future simulations having proper fixed point with configurable bit-width / saturation would be real handy to have in matlab. Any hints/tips?

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Additionaly, I did notice Fixed-Point Designer. But 2500 monetary units for a few overloaded operators and new datatypes seems a bit steep...