hi
You need to check if the timing is clean in your layout implementation tool as well as your timing signoff tool
you need to check for timing (WNS, TNS) , max cap , max trans violations in your reports , which path group are violating ...
hi
You need to check if the timing is clean in your layout implementation tool as well as your timing signoff tool
you need to check for timing (WNS, TNS) , max cap , max trans violations in your reports , which path group are violating ...
Clock skew comes into picture once you have clock tree built which will come after you have your timing clean at placement stage.
So you can check what is the timing at placement (WNS,TNS) , if that is clean ( within the limits you expect ) then you can proceed for clock tree and once clock tree is built you can check for skew in various path groups
i am not very clear about when you say "industrial approach" ....but let me put it this way , clock skew requirement varies from design to design and it will not be something for which you can have a general rule .....