Hello,
please , i want to program AD75019 , an analogue Cross point Switch from analogue devices 16x16, with FPGA, ad75019 have a serial interface, i'have to shift 256 bit into 256 bit shift register , once the register is full i apply a PCLK pulse to to transfer the register to latch (like it's mentionned in the datasheet) my problem is, that i can'T close or open any switch
please , anyone could help, thanks in Advance
this my configuration:
VDD:11V
VCC:5V
VSS: 0V
SCLK: 1MHZ
this how i did the spi interface : a shift register of 256 bit with a state machine for controlling PCLK signal:
Important details are hidden in the design, the shift register is e.g. missing a paralle load signal, I wonder how it's working at all. Personally I would prefer to see trivial functions like this in the behavioral code to be able to check their operation.
Generally, you should check the waveforms generated by your design either in a simulation or in hardware with SignalTap/Chipscope and compare with the datasheet requirements.
SCLK: inout std_logic; --inout pour qu'il peut etre lu en process
You should either define SCLK as buffer type or copy an internal alias signal to the output port, to be able to read it back in the design. Inout has a different purpose.
P.S.: Positional association in component instantiation is generally fault-prone. I really suggest to use named association, also to improve code readability.