Sorry, I misunderstood your question.
It is more complex: we have two different layouts (symmetric with center tap or non-symmetric single ended).
And in addition, the EM simulation model can be different: one port between the inductor terminals, or one port per inductor terminal (with all port references at substrate). That is what my appnote discusses. It is important to understand that your EM results will change depending on the port configuration. This is because every on-chip inductor has series (L,R) and shunt path (to substrate). My description in the appnote applies to both inductors, symmetric or non-symmetric.
Sorry I can't give a better description. You need to understand these effects, for proper use of ports, otherwise your EM results will be misleading.