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[Moved] Design of Low Noise Amplifier

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karthik001

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In our LNA design using ADS the s-parameter s(1,2) ands(2,1) are similar and negative.Is there any specific method to obtain s-parameters in advanced design system.In this design we have used MOSFET_NMOS and MOSFET_PMOS from RF library.We are new to this software please help. Schematic.pngData display window.png
 

Have you ever checked the DC Operating Point of the MOS transistors ? I think they don't work because the Bulks are not connected to nowhere.
 
We checked DC operating point using both DC annotation and FET curve tracer but we got different values.How do we use these values in LNA schematic in order to get postive gain.LNA Schematic.pngDC annotation operating point.pngNMOS schematic.pngNMOS bias characteristics.pngPMOS schematic.pngPMOS schematic.png
 

MOS 3 is totally off :) pA !

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you connected the gate voltage of MOSFET4 to negative voltage !

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I do not understand your biasing circuit.
 

MOS 3 is totally off :) pA !

- - - Updated - - -

you connected the gate voltage of MOSFET4 to negative voltage !

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I do not understand your biasing circuit.
we have made the changes in circuit schematic and simulated.we biased the transistor and used these values in schematic but even then the gain is negative can you suggest some 130nm transistor model.
LNA CKT schematic.pngLNA CKT results.pngNMOS bias charcteristics.pngNMOS bias.png

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Have you ever checked the DC Operating Point of the MOS transistors ? I think they don't work because the Bulks are not connected to nowhere.
We did check the DC operating point and simulated the schematic and still are getting negative gain. Have we used the bias characteristics value correctly ? If not how do we do it ?
**broken link removed****broken link removed****broken link removed****broken link removed**
 

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