In the area report for Leonardo Spectrum it is giving number of gates under the label of area.
But the area of an ASIC design is different from the number of gates. Then how are we supposed to calculate the area and the Gate Equivalents when only the number of gates is given?
In the area report for Leonardo Spectrum it is giving number of gates under the label of area.
But the area of an ASIC design is different from the number of gates. Then how are we supposed to calculate the area and the Gate Equivalents when only the number of gates is given? View attachment 151234
In the above area report there are references mentioned as :
12 x 8
12 x 11
4 x 8
whose corresponding areas are 91, 131 and 30 respectively.
How is this area derived from these references (if it is not just a simple multiplication)?
Again, are you reporting area on a design that has been mapped? What design is this, what library are you using? I have no way of knowing what these numbers are. 12x8?! 12x11?
The first column is the number of instances of that cell. The second column is the 'area' of that cell. However, area is given as a factor of something else. I believe this comes from the usage of scl05u, which is not a real library. It's more of a sample. The fact that a inverter has a size of '3 gates' is very weird.