[Moved]: a question for dc psrr for a 2 stage circuit ??

[cmos_ajay]

What is the DC PSRR (power supply rejection) for this attached circuit ?

 

[erikl]

In this configuration the PSRR will be terribly bad, even > 0dB *), as the interference source lies inside the input control loop.

*) if PSRR is defined like gain: PSRR = 20log(v_out_i / v_ps_i) ; i = interference or noise

 

[cmos_ajay]

Hello Erikl,

I was only looking for an equation for PSRR in terms of R1, R2, gm1 etc....
Basically an expression ?

 

[erikl]

I'd think in this configuration (power supply interference source in the input control loop),
PSRR is the same as gain (no rejection at all), i.e. - in first order approximation, neglecting the output impedances of the transistors -
PSRR = gain ≈ gm1*R1 * gm2*R2

If you move the power supply interference source outside of the input control loop, PSRR ≈ gm2*R2 ,
- s. the right side of the PDF: View attachment PSRR.pdf

 

[cmos_ajay]

I can derieve it as follows ->
psrr = 20*log(vdd/vout) and [1/psrr] = 20*log(vout/vdd)

id1 = gm1*vsg1 = gm1(vs1-vg1) = gm1(vdd - 0) = gm1*vdd

id2 = gm2*vsg2 = gm2(vs2-vg2) = gm2[vdd - (id1*R1)]

But, id1 = gm1*vdd as found earlier

and so id2 = gm2[vdd - (gm1*vdd*R1)]

id2 = gm2[vdd{1 - gm1R1}] = gm2*gm1*R1*vdd ....approximately

vout = id2*R2 = [gm2*gm1*R1*vdd]*R2

Vout/vdd = gm2*gm1*R1*R2

Any comments on this ??