MOSFET switching question

[foxbat_gb]

Hi Guys,

I'm working with an LCD that has AVDD (5V power) and DISP (3.3V logic) lines. The datasheet says that DISP should not go high before AVDD. Therefore I'm planning to switch them both with a pair of logic-level MOSFET's. Will this layout work do you think? The idea is that the 1K gate resistor on Q1 causes the MOSFET to switch on slightly later than Q2 that has the 100R resistor when AVDD_EN is pulled high by the MCU.

 

[FvM]

Not doesn't work with NMOS transistors if you don't have an enable voltage above Vcc. PMOS switches or PNP BJT are often used as supply switches with inverted enable signal.