MOSFET load switch circuit overheating

[gradavi]

Hello,
I have a simple n-channel MOSFET circuit to statically switch on or off a 36Vdc supply to a 30 Ohm resistive load. The MOSFET's drain is connected to the +36Vdc supply, the source is connected load resistor, the other end of the resistor to GND. When Vgs is around zero, the switch is "off" and zero voltage supply to the resistor, as it should be. However, with a Vgs of 9.5V, the MOSFET doesn't seem to be fully on and overheats quickly. I'm getting just 6V on the resistive load, so a Vds of 30V instead of virtually 0V. The MOSFET is an IRFZ44N : VDS up to 80V, RdsON = 13milliOhm at Vgs=10V&10A, IdMax=10A, Gate threshold = 4.9V max (typ. 3V).
Am I missing something obvious here? It's such a simple circuit.
Thanks for any help.

 

[betwixt]

Please show the circuit.
From the voltages you quote, it looks more like Vgs is the gate voltage from ground instead of between gate and source. For full conduction the gate voltage has to be close to 36V above ground.

Brian.

 

[D.A.(Tony)Stewart]

Like an Emitter Follower, you have a Source Follower that has enough Vg for the source to follow 3.5V below at 6V across 30 Ohms or 36/30= 1.2W. Meanwhile, Vds = 30V and 5 times the voltage and heat dissipated in the FET.

If you wanted a switch with an NFET, but must use Vg = 36V+5V= 41V. In a half-bridge this is easily done with a voltage boost diode cap using the low side PWM to create a Boost above Vd. Vgs= 5V covers the variations between FET Vgs(Th) thresholds.

The simplest solution is to use the NFET as a low-side switch or use a PFET driven by an NPN-C to the PFET-gate with a pull-up R to V+.

You are using Vg = 9.5V to ground yet erroneously reported Vgs = 9.5 V

 

[KlausST]

Hi,

we have schematics for a good reason.
Even hand drawn it gives more informations about your real circuit than a textual description can do.

For full conduction the gate voltage has to be close to 36V above ground.

If the transitor is fully ON the V_DS drop is close to zero. Thus the load voltage is close to 36V.
thus the source voltage (to GND) is about 36V.

V_GS means "Voltage between Gate and Source."
Now if you want V_GS to be 9.5V then the total Gate voltage (to GND) has to be 36V + 9.5V = 45.5V

***
Tony describes the usual way to use the MOSFET as a switch with low component count.
***

BTW: The problem is as old as transistors. And the mistake is done million times before. Every document on "how to use MOSFETs as a switch" or "basic MOSFET circuits" will teach you the correct way. One can read those documents .. or not. Then one "learns by doing", with the risk of explosion and fire.

Klaus

 

[gradavi]

Many thanks for the replies guys, and apologies for the delay in replying (been moving around). You're right that I confused Vgs with Vg-GND. I think you're also right in that I just move the FET to the low side : see "New" circuit in attachment. This is what I had in mind at first but got pushed off-course somehow by looking at other designs, possibly with P-channel MOSFET. I'll try the new circuit and report back. Cheers.

 

[KlausST]

Hi,

got pushed off-course somehow by looking at other designs

I can only recommend NOT to use hobbyists designs as your reference. (Most of them are really crappy and contain big mistakes.. if they work at all)
Semiconductor manufacturers provide very good, detailed application notes for almost any application. They are reliable, you can trust them.
I have to admit - they may be harder to read because of the math, formulae and terminology. But this is for a good reason. the more soon you become familiar with the terminology and descriptions the less problems yu will encounter and the more reliable your designs will become.

Btw: You NEW design will work much better. Some remarks:
* Are you sure you still need the 27k? It makes the MOSFET to be ON by default.
* I´d add a zener across D-S of the MOSFET. You load and the wiring may contain some stray inductance that may cause a voltage peak on switch_off.
* I´d add an electrolytics capacitor and a parallel fast ceramics capacitor on your 36V.

Klaus

 

[dick_freebird]

So, begin with true Vgs measurement, on and off state.
If you don't give the PMOS a solid -10V then channel
resistance will be worse and Pdiss higher. That all goes
to heat.

So then, what's el heat sink plan? A watt in still air will
be toasty. 10W, you need passive convection and a good
big finned heat sink, or forced air and smaller heat sink.

Gate divider network may "throw away" gate drive if you
pick the wrong values, and a high impedance gate network
(like, 2K Zgate is stupid weak for a fat power FET with
10nF Cgg - slow transitioning, possibly even oscillatory).
Might put the 'scope to it one time and look for that,
time spent in drain not-on and not-off will sure cook the
channel (medium-high R, medium-high I).

 

[gradavi]

Thanks for the extra tips.
For info : I switched to a smaller footprint MOSFET (IRF7854TRPBF) with a similar low Rds ON value, but in a 8-pin DIL package. The circuit works well. I even upped the load to 24 Ohms (Id=1.5A) just to see how it worked when pushed. The load is actually just a ceramic heating element. Vgs = Vg-GND was 9.7V when on. Vds was less than 30 milliVolts and the MOSFET remained at room temperature, even @ Id=1.5A.
I also tried adding a 10KOhm resistor between the gate and the 27K/10K node point, but no change (just goes to show how little current the gate draws I suppose).
Thanks again. I'll look into adding capacitors and the diode.

 

[D.A.(Tony)Stewart]

Very low RdsOn FETs are also high Capacitance, which is the nature of PN junction switches and diodes. This means you must drive them with relatively low impedance approaching if not equal to the gate series resistance, Rg. If you imagine the semiconductor becoming an excellent conductor between a smaller gap, it also starts to look like a capacitor. Thus the higher the current rating, the bigger the capacitance as it switches on.

Meanwhile, there is always a limit for Vgs voltage and 15V is a common value, yet you only need to apply 2.5 to 3 times the leakage threshold voltage called Vt or Vgs(th) @ xxx uA to achieve this RdsOn because of the square law effect above Vt on RdsOn.

Very low RdsOn FETs have a parallel nanostructure which demands care in switching such that all these nanoswitches operate in parallel really fast so that the load is conducted by all of them quickly. This is why high gate resistors and gate capacitance can cause oscillations and thermal failures due to these characteristics.

So look around at how pros use the infamous "IRFZ44N" and don't try to re-invent a square wheel.

This was a gross simplification arm-waving analogy.