I don't think you can do it very well. "Size" is a "bin" of
rough die area, but this is loosely coupled to gate area
and technology type (hex, trench, superjunction) will
all have very different gate and neck geometries, so
Cs will vary. Voltage is also a big deal especially for
Cdg, Cdb as it drives doping and depletion spread.
The best I can think of is to focus on FETs which look
related (technology, "size", voltage) and collect their
datasheet Cxx values, this would at least give you
the feel of the neighborhood.