Jeyavijayan
Newbie level 1
Hi,
I like to run montecarlo analysis in cadence 5.1 version.
I have the follwing files for running a monte carlo analysis on a resistor:
simulator lang=spectre
parameters monteres=1000
inline subckt model (monteres PLUS MINUS)
parameters monteres_dev=monteres
model ( monte_res PLUS MINUS) resistor monte_res = monteres_dev
ahdl_include "model/veriloga/veriloga.va"
ends model
statistics {
process{
vary monteres dist=gauss std=25
}
}
And the veriloga model of the resistor is
`include "discipline.h"
`include "constants.h"
module resistor( PLUS, MINUS);
input PLUS;
output MINUS;
electrical PLUS, MINUS;
parameter real monte_res = 10;
parameter real r = 100;
parameter real r_effective = r + monte_res ;
analog
V(PLUS,MINUS) <+ (r_effective)*I(PLUS,MINUS);
endmodule
I am not able to change the parameter monte_res inside the veriloga file from the top level .scs file. And also I am not able to run the monte carlo analysis. Kindly tell me where I am going wrong.
Thanks in advance.
I like to run montecarlo analysis in cadence 5.1 version.
I have the follwing files for running a monte carlo analysis on a resistor:
simulator lang=spectre
parameters monteres=1000
inline subckt model (monteres PLUS MINUS)
parameters monteres_dev=monteres
model ( monte_res PLUS MINUS) resistor monte_res = monteres_dev
ahdl_include "model/veriloga/veriloga.va"
ends model
statistics {
process{
vary monteres dist=gauss std=25
}
}
And the veriloga model of the resistor is
`include "discipline.h"
`include "constants.h"
module resistor( PLUS, MINUS);
input PLUS;
output MINUS;
electrical PLUS, MINUS;
parameter real monte_res = 10;
parameter real r = 100;
parameter real r_effective = r + monte_res ;
analog
V(PLUS,MINUS) <+ (r_effective)*I(PLUS,MINUS);
endmodule
I am not able to change the parameter monte_res inside the veriloga file from the top level .scs file. And also I am not able to run the monte carlo analysis. Kindly tell me where I am going wrong.
Thanks in advance.