modulo addition implementation in vhdl

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chaitanya.531

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excuse me folks

i have q about addition modulo n implementation in vhdl
how do i implement that in vhdl
 

with some VHDL
I suggest you get started, and then come back with specific problems.
 

i want to do addition modulo n on integers a and b
 

for simulation, (x + y) mod z will work for 32b signed integers. for larger values, or for synthesis, you would need to do the add + division/modulo. This tends to be a multi-cycle operation unless "z" is a constant. in which case the division can be approximated by a multiplication by constant.

There are IP cores and other simple methods for div/mod.
 

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