Does anyone know an automatic way to capture submodules I/O into wave.do file, grouping them just the way the sub-modules are instantiated?
Since ModelSim already parses the RTL anyway, surely someone has figured out how to save time by automatically generating the wave.do that captures all the I/O of all submodules. Anyone knows how to get ModelSim to do this? Or does anyone have such a tcl script and willing to share? Thx.