modbus crc-16 parallel implementation in vhdl

[anoperson]

modbus crc-16 parallel implementation in vhdl for rtu

Hi I want to implement parallel crc calculation for modbus(rtu protocol) in vhdl (not by using serial process or loops).

Free CRC tools like output logic or easics do not give correct logic for modbus as they use CRC-16ccit.Even with modbus polynomial they give incorrect output.

Lookup table can be used for parallel implementation however it is difficult in vhdl.

Can anyone help me with the parallel equations?

 

[aruipksni]

Re: modbus crc-16 parallel implementation in vhdl for rtu

Hi I want to implement parallel crc calculation for modbus(rtu protocol) in vhdl (not by using serial process or loops).

Free CRC tools like output logic or easics do not give correct logic for modbus as they use CRC-16ccit.Even with modbus polynomial they give incorrect output.

Lookup table can be used for parallel implementation however it is difficult in vhdl.

Can anyone help me with the parallel equations?

you can't do everything in parallel in one single action, you can optimise some loops, and use techniques like pipelining, but there will
be always some latency, and limits to this ability.

 

[anoperson]

Re: modbus crc-16 parallel implementation in vhdl for rtu

you can't do everything in parallel in one single action, you can optimise some loops, and use techniques like pipelining, but there will
be always some latency, and limits to this ability.

yeah but crc in other protocols can be implemented by parallel logic using for e.g.-http://www.easics.com/webtools/crctool or http://outputlogic.com/?page_id=321.

Just that it does not work for modbus polynomial xA001

 

[permute]

Re: modbus crc-16 parallel implementation in vhdl for rtu

Are you sure you have done the other parts of the CCITT implementation -- the initialization to -1, the byte swap, and the final inversion?

The state-update logic should be fine from easics. The registers should be resettable to 1's (or a mux should be provided to mux in 1's on the first input). The output should have an inverter and byte swap.

(you may also need to ensure you have the bit ordering correct for the parallel implementation. This might mean bit-reversing each byte to be lsb-first)

I suggest starting with the all 0's input of different lengths to ensure you can get that to work, then move on to all zeros and a single 1, then to random inputs.

 

[aruipksni]

Re: modbus crc-16 parallel implementation in vhdl for rtu

you can use the LUT aproach. it's probebly the easy way...

 

[FvM]

Hi I want to implement parallel crc calculation for modbus(rtu protocol) in vhdl (not by using serial process or loops).

Loops are the standard way to implement parallel logic in HDL...

 

[anoperson]

Re: modbus crc-16 parallel implementation in vhdl for rtu

you can use the LUT aproach. it's probebly the easy way...

how to use lut approach?

- - - Updated - - -

Are you sure you have done the other parts of the CCITT implementation -- the initialization to -1, the byte swap, and the final inversion?

The state-update logic should be fine from easics. The registers should be resettable to 1's (or a mux should be provided to mux in 1's on the first input). The output should have an inverter and byte swap.

(you may also need to ensure you have the bit ordering correct for the parallel implementation. This might mean bit-reversing each byte to be lsb-first)

I suggest starting with the all 0's input of different lengths to ensure you can get that to work, then move on to all zeros and a single 1, then to random inputs.

But i'm using modbus protocol and not ccitt. In modbus crc register is intially loaded with all 1's. Easics and output logic do not give correct crc for it.
for example data=x"FF" should give crc as x"00FF" but it is giving something else entirely.
both these tools give the option for entering custom polynomial (it is x^15+x^13+1 for modbus) however that is not working.

- - - Updated - - -

Loops are the standard way to implement parallel logic in HDL...

but are loops synthesizable?

 

[TrickyDicky]

Re: modbus crc-16 parallel implementation in vhdl for rtu

but are loops synthesizable?

Yes, if used correctly.

 

[aruipksni]

Re: modbus crc-16 parallel implementation in vhdl for rtu

you might try to use it with vivado hls. i took the c code from the spec, and manage to lower latency to resonable size by pipelining.
so if you'll play with it you might get better results.

 

[permute]

Re: modbus crc-16 parallel implementation in vhdl for rtu

But i'm using modbus protocol and not ccitt. In modbus crc register is intially loaded with all 1's. Easics and output logic do not give correct crc for it.
for example data=x"FF" should give crc as x"00FF" but it is giving something else entirely.
both these tools give the option for entering custom polynomial (it is x^15+x^13+1 for modbus) however that is not working.

That is correct according to an online crc calculator. For reference, 0x00 would have a CRC of 0x40BF. 0x01 maps to 0x807E, and 0x80 maps to 0xE0BE. 0x0000 maps to 0xB001 and 0x00000000 maps to 0x2400. Try to get these test cases to work first. 0xFFFF should return 0x0000.

I suspect you are overlooking some detail of the CRC calculation and that the easic portion is ok.

 

[anoperson]

Re: modbus crc-16 parallel implementation in vhdl for rtu

That is correct according to an online crc calculator. For reference, 0x00 would have a CRC of 0x40BF. 0x01 maps to 0x807E, and 0x80 maps to 0xE0BE. 0x0000 maps to 0xB001 and 0x00000000 maps to 0x2400. Try to get these test cases to work first. 0xFFFF should return 0x0000.

I suspect you are overlooking some detail of the CRC calculation and that the easic portion is ok.

You are right about crc calculator.
I tried all combinations of modbus(reversed -x"A001" polynomial and normal-x"8005"). However the values don't match with those of crc calculator.
Is there some adjustment i'm missing? (i tried inverting ,reversing but it does not work)

If you can please give he corrected code if you have it.