Metal1(pin) layer treats as Metal1(mt) layer

[wccheng]

Dear all,

I am using Assur@ to do DRC and LVS checking of my layout. I am carelessly using Metal1(pin) layer to draw a metal line to connect the circuit. Actually, it should be used Metal1(mt) to connect it. DRC passes. However, the LVS also passes. This makes so strange because it should give out a wrong message to me. After I uses C@libre to do LVS, it gives out no connection. Does Assur@ need to set something in order to give out the error message to me?

Thanks

wccheng

 

[shitansh]

Not exactly same but somthing like this problem i had faced when i was using lasi tool.

I would like to tell you my experience in that.

In LASI while layout a transistor initially i was not giving poly extension over diffusion then also it passes through DRC and LVS.

Then i had checked DRC file in that I have added statement for this so that it can give me error and after doing this it shows error which was not showing previously.

HTH

 

[erikl]

Dear all,

I am using Assur@ to do DRC and LVS checking of my layout. I am carelessly using Metal1(pin) layer to draw a metal line to connect the circuit. Actually, it should be used Metal1(mt) to connect it. DRC passes. However, the LVS also passes. This makes so strange because it should give out a wrong message to me. After I uses C(at)libre to do LVS, it gives out no connection. Does Assur@ need to set something in order to give out the error message to me?

Thanks wccheng

I guess your Assur@ DRC & LVS files are not ok. Probably the concerned metal layers are being mixed together (ORed) too early in order to facilitate the DRChecks. Actually, for DRC it wouldn't matter so much - it just would be nice to find the pb. in a very early stage - but the LVS should flag an error in any case - as the C@libre LVS actually does.

HTH, erikl

 

[wccheng]

Dear all,

I am very thanks for your reply. I have checked the rule file provided by foundry. It is caused by the non-perfect rule file writing in Assur@ platform.

Thanks

wccheng

 

[smilodon]

Actully, the results depend on your rules, in which you can find which layer is used.

BTW, before you do your drc/lvs, please read the rules firstly, sometimes you can find something important in which.

Good luck!