I would make a single schematic with three items in it.
An inverter with input=vss, an inverter with input=vdd,
and an inverter that is switched though a RZ cycle.
The .op for the first two will give you the static leakages
while the last will give you dynamic power per cycle,
which you can apply to any Hz you like (up to the point
where output fails to settle fully, within the cycle.
I/Os exposed to a more variable input, might want stuff
like biased-at-VOLmax, biased-at-VOHmin added to
the mix.