[SOLVED] Meaning of 'Macro depth'

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circuit.maker

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While reading floorplan guidelines from Innovus User Guide, I came across the following:

"Assess different floorplan styles such as hard macro placement in periphery, island, or doughnut (periphery and island). Keep the macro depth at 1 to 2 for best CTS, optimization, and Design-for-test (DFT) results. If possible, consider different aspect ratios to accommodate a shallower macro depth."

What is meant by 'macro depth' in the above paragraph?
 


If you have something like LOGIC MACRO LOGIC, depth is 1.
If you have something like LOGIC MACRO MACRO LOGIC, depth is 1.
If you have something like EDGE MACRO MACRO LOGIC, depth is 2.


It's just the number of macros that the router will have to go through before reaching the macro farthest away from standard cells.
 
I don't think I understand. Let's assume I have a squarish floorplan and all my macros are arranged on the periphery and the standard cells are concentrated in the center part. On one side of periphery I have some macros stacked by each other. Is it the distance from the standard cell core to each individual macro in the stack, the 'macro depth'? I've attached an illustration for the same.

 


Yes, that's correct.
 
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