[SOLVED] Maximum number of mosfet driven by IR2110

[Electro nS]

hello

i am using a mosfet with gate charge of 550nC , switching frequency is 16khz to 20khz , gate resistor about 10ohm

the iR2110 specifies 2A current capability , the bootstrap capacitor is 1uF (non polarizied) ,

1-how many mosfets in parallel this chip can drive ?? ( is 4 a resonable number ??)

2-do i have to increase the bootstrap cap (duty is from 0-to 95%)?? do i have to added 10uF polarizied as i have seen in some posts online ??

3-and if it works in halfbridge configuration so: 8 mosfets and 1 driver , how much maximum dc current should the 12v regulator supply ??

thanks and regards , any info, answer or guidence to an app note is appreciated

 

[Electro nS]

thanks for your helpful replies !!!

i have some answers for what i was looking at : AN799 microchip :Matching MOSFET Drivers to MOSFETs

and irf appnote : HV Floating MOS-Gate Driver ICs

i will mark as solved , although i still have no answer for question 2- and 3

 

[FvM]

I believe that the design equations that answer your questions are derived in many application notes, e.g. from IRF.

Gate driver supply current (ignoring static quiescent current) is e.g. simply Qg*Vdd*fsw.

Minimum boostrap capacitance can be calculated from Qg and acceptable Vdd voltage drop. Some circuits have a larger static current consumption that must be considered additionally.

 

[Electro nS]

I believe that the design equations that answer your questions are derived in many application notes, e.g. from IRF.

Gate driver supply current (ignoring static quiescent current) is e.g. simply Qg*Vdd*fsw.

Minimum boostrap capacitance can be calculated from Qg and acceptable Vdd voltage drop. Some circuits have a larger static current consumption that must be considered additionally.

thanks , but just a small question about the equation : Qg*Vdd*Fsw ,
Qg is for 1 transistor ?? , example : H bridge 4 mosfets each have 550nC , so total current =(4x550n)*Vdd*Fsw ???
I think this might be wrong because not all transistors are switched i the same time , assume sign magnitude drive or locked antiphase
please clarify

 

[FvM]

I think this might be wrong because not all transistors are switched i the same time , assume sign magnitude drive or locked antiphase

The calculation applies to all transistors driven by the respective high side driver and it's bootstrap capacitor.

 

[kappa_am]

are you sure about this equation Qg*Vdd*fsw? because it has not current dimension.

 

[FvM]

Review some basic electrotechnical text book.

Charge unit is ampere seconds.

 

[kappa_am]

Qg*Vdd*fsw (ampere*t)*vdd*1/t= i*vdd=p
still beat me!
could you plz introduce a reference for this equation?

 

[kappa_am]

I have looked to IXYS and fairchild ANs, as I thought this is gate power not gate current. as it evidence it has power dimension not current (ampere).

I believe that the design equations that answer your questions are derived in many application notes, e.g. from IRF.

Gate driver supply current (ignoring static quiescent current) is e.g. simply Qg*Vdd*fsw.

 

[FvM]

You are right. Qg*Vdd*fsw is power, not current.

 

[Electro nS]

You are right. Qg*Vdd*fsw is power, not current.

I rechecked : page 2 in AN799 microchip . power due to switching is : P=C*V*V*F , can be reduced to P=Q*V*F

then I is independent on Vdd , and is : Q*F only right ?????

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[FvM]

Qg is still Vdd-dependend, but not that much.