Protecting a MOSFET gate driver

[t1lt]

Hi folks, I looked around and can't seem to find a good solid answer on this one

I have a simple solenoid driver design, where a 5V MCU is driving the gate of a logic-level FET to pulse a Solenoid.

The solenoid L1 has a diode Dl to suppress inductive spikes, so basically this circuit works great, but I'm looking into
how to bulletproof it a bit more.

Like let's say in the event that the Dl cracks off, and now the MOSFET is exposed to a full inductive spike...

• Would the addition of TVS Dds in the circuit provide just as effective an inductive spike suppression? I.e. is it fully redundant protection with Dl or just a band-aid that would eventually lead to MOSFET failure?
• If the drain overvoltage destroys the MOSFET, the DS junction will typically short blowing fuse F1. But in the moment of failure before the fuse blows, if the gate junction blows out as well, a high voltage spike could also potentially backfeed into the MCU output pin... which I want to try to protect in this failure mode. Would the addition of Dgs be the most obvious way to do this?

Any other thoughts on how protect my poor MCU in the event of MOSFET destruction would be welcome as well of course... thanks!!

 

[dick_freebird]

I don't think your 5V through divider is going to be adequate gate drive. A 74AC series logic gate would be good for both drive and protection if you truly want 5V to the gate. Think about an octal bus transceiver in SOIC, 8 "24mA" (@0.5V) ESD-protected drivers in parallel - or 1 drives 7. For about the BOM cost of the R network and clamp. But you'd need 5V at the far end.

 

[ahsrabrifat]

The 1N4004 is a slow-recovery diode (~30 µs), which could be problematic if your solenoid operates at high frequency. If possible, consider using a Schottky diode like SR360, or STPS2H100 or a fast-recovery diode like UF4007 to handle inductive spikes more effectively.

 

[KlausST]

"5V_MCU_That_Needs_Protecting"

I´m a professional industrial electronics designer for decades ... And I´d say: at this node you don´t need protection. At least I never did any protection .. and still there never was a fail.

Why: If there is a "dangerous signal" at this node, then a different device needed to go fail beforehand.

Now I have my rule:
* better remove the root cause than curing the symptom

If you fear the DI to go fail, then do something to avoid this.
Every electronics part go fail because of three major reasons:
* overvoltage (even short peaks in the nanoseconds)
* overcurrent (even short peaks in the microseconds)
* overheat (ambient temperature plus internal power dissipation)

**
for the DI:
* overvoltage is not a big problem. Still I´d add a capacitor at the node top of L1 to GND to avoid spikes caused by stray inductance of wiring and traces.
* overcurrent. You know the solenoid current .. and that´s the highes current the diode can expect.
* overheat: only you know the ambient temperature range and the expected power dissipation. --> do worst case calculation

* for the MOSFET:
quite similar like the diode.

AND: be sure to make all critical paths low inductance. Nowadays a solid GND plane (no copper pour with a lot of GND islands. Solid in the meaning of uncut)

Klaus

 

[cupoftea]

I agree with Klaus, but if you want to add extra protection just to please someone who isnt to savvy, and insists on it, then just add in a gate drive IC in between the micro and the FET. Add a TVS across the FET if you want also.

 

[t1lt]

These are all great suggestions, thanks!

Back to my original question though, if the connection to Dl fails, then the MOSFET will also fail in short order
In this failure mode, what is the best way to protect the MCU?

 

[barry]

Why are you only worrying about D1 failing? ANYTHING can fail.

I agree with Klaus (and Dick Freebird about your gate drive). But, if you're REALLY concerned, you could put an optoisolator in your gate drive circuit.

 

[dick_freebird]

An "avalanche rated" FET might just tolerate flyback
energy.

The "DDS" TVS presumably has a crack-over voltage
above WC max "30V" supply? But would that not
adequately protect the gate against D-B breakdown
(if properly selected)?

How much capacitance do those TVSes add? Do you
care about switching times? Your FET might care if
the turnon or turnoff are so leisurely that you spend
mucho time on the Miller plateau where both current
and voltage are substantial (power FETs often designed
to spend nanoseconds away from their two preferred
states ("off" and "on", neither making as much power
dissipation internally).

 

[cupoftea]

10k resistor from the micro into a mosfet driver IC. That should protect the micro.

 

[KlausST]

Hi,

if the diode fails .. and if the mosfet fails in a way that the drain shorts to gate ... and and and.

then you get 36V across a 10k ... resulting in 3.6mA .. then also this resitor needs to fail .. because the 3.6mA won´t hurt the microcontroller.


so the risk is let´s say below 1:1,000,000.
so if you sell 10millions of these products and installed 10 millions of protection devices ... including assembling this may cost you 1.5million $ ... to save less than 10 pieces of your microcontrollers.

To make this worth the effort .. your microcontroller should cost in the range of 150,000 $ per piece.

In short: anybody who is into finance ... would call it counter productive.

Klaus

 

[danadakk]

You have a 10K path limiting current to supply gate charge into roughly 2000 pf Ciss, not counting miller.

Do a sim for the rate at which you will be switching to confirm power dissipated in fet because you have it
expending significant power due to slow switching time.

A 1N4007 is not exactly a great choice for a clamp diode, you have to handle the current you will establish in
solenoid when fully on, when it turns off, for the switching interval. Use margin here in diode choice,
preferably a fast diode or better.

Do you have a spice model for MOSFET you can post ?

 

[t1lt]

@dick_freebird and @danadakk it is a good point about switching times. Actually I see my schematic above has a typo, Rg is actually 5.1K ohms at the moment. But still you are right, the switching time is pretty slow. I don't have a SPICE model (this part seems quite close though) but back of the envelope, a gate threshold of 2V gives charging at around 0.5mA into a 23nC total gate charge, maybe 50uS or so at the moment? I'll have to measure it... One good thing is that the solenoid won't fire faster than around 4Hz max, so the total power losses during switching will still be quite low I think, even with a bit of a lousy turn on time.

And of course on the flip side, like @KlausST noted, a high gate resistor has the benefits too... namely pretty good protection to the MCU on its own, just by limiting the current back into the GPIO pin...

TVS at Dgs would be pretty low capacitance (15pF) and quite inexpensive ($0.005)... So maybe the compromise way would be to lower the Rg to 1K, giving a better turn on time of more like 10uS, but still comfortably drivable by the MCU, then add the TVS to hard clamp at a lower voltage in the (hopefully rare, as @KlausST notes ) case of an overvoltage event on the gate?

You all have given me a lot to think on... thanks!!

 

[KlausST]

Hi,

rare.
If my remembering is correct, I never saw a broken free wheeling diode, nor a broken MOSFET, BJT in my designed devices.. over decades.
I remeber a single SCR that got slightly conductive on 400V RMS, while it was a 1200V AC / 250A RMS type .. this was at the very first minute of operation.

I remember a couple of these SCR to got fail due to overcurrent conditions .... because the customer did two things:
* he used a bad, sparkling self made contact on the 250A line
* and additionally disabled my overcurrent protection (Because it detected the spark problems and switched OFF the device. It then waited for an operator to acknowledge the overcurrent error)

I did quite a lot power applications up to 3000A RMS, 1200V RMS, 1MW... but nothing with huge volume.
All had in common that the worst case situations were mathematically calculated. So I knew the SCRs (I mentioned above) can handle (according datasheet) 3 short circuit conditions in one minute ... but they can´t handle short circuit continously.

Klaus

 

[mtwieg]

I don't see any harm in actually addressing the original question:

Like let's say in the event that the Dl cracks off, and now the MOSFET is exposed to a full inductive spike...

• Would the addition of TVS Dds in the circuit provide just as effective an inductive spike suppression? I.e. is it fully redundant protection with Dl or just a band-aid that would eventually lead to MOSFET failure?

Yes, the TVS diode (if chosen properly) will limit the Vds seen by the MOSFET. But also keep in mind that the TVS diode will dissipate far more power than DI would, so would need to be sized accordingly (and all that extra power must come from the DC supply, which might be an issue). If you're worried about a random open failure of DI, simply adding a redundant one in parallel is probably a better option.

• If the drain overvoltage destroys the MOSFET, the DS junction will typically short blowing fuse F1. But in the moment of failure before the fuse blows, if the gate junction blows out as well, a high voltage spike could also potentially backfeed into the MCU output pin... which I want to try to protect in this failure mode. Would the addition of Dgs be the most obvious way to do this?

Hard to speculate on the exact behavior as the MOSFET dies. Like the previous answer, yes Dgs should help limit Vgs, but only if it's actually rated to withstand that stress without failing itself. It's practically impossible to put an upper limit on what that stress might be, though. If your main objective is to protect the MCU, rather than the FET/relay, then putting the clamping diode(s) on the MCU-side of Rg is a better option. Rg and those diodes then have to be rated for the worst-case stress (full supply voltage across Rg until the fuse blows).

Also as others mentioned, such large Rg values will be a problem if you plan to drive the relays with PWM.

 

[t1lt]

Yeah I think to go further I might have to blow up some MOSFETs and see what happens
thanks everyone!