megaknaller
Member level 2
Hello there,
This might be a quite basic question, but I am maybe missunderstanding something. What is the maximum collector-emitter voltage that a transistor can hold when operating as a normal amplifier? In other words, how high are the AC signal between the collector and emitter allowed to swing and how is this related to BVCEO? If my transistors have a BVCEO of 1.5 and I observe a time domain signal that swings up to 1.8 V with a quiescent VCE point of 1 V, how dangerous is this for it? I assume it has a relation with the frequency of the signal because it determines how much time (power) the transistor remains over the 1.5 V scale, but I cannot get the full picture stil how to relate those 2 maximum voltages.
Would appreciate any comment or explanation about this. I wouldn't like to blow up my circuit.
Many thanks and best regards.
Megaknaller
This might be a quite basic question, but I am maybe missunderstanding something. What is the maximum collector-emitter voltage that a transistor can hold when operating as a normal amplifier? In other words, how high are the AC signal between the collector and emitter allowed to swing and how is this related to BVCEO? If my transistors have a BVCEO of 1.5 and I observe a time domain signal that swings up to 1.8 V with a quiescent VCE point of 1 V, how dangerous is this for it? I assume it has a relation with the frequency of the signal because it determines how much time (power) the transistor remains over the 1.5 V scale, but I cannot get the full picture stil how to relate those 2 maximum voltages.
Would appreciate any comment or explanation about this. I wouldn't like to blow up my circuit.
Many thanks and best regards.
Megaknaller