tj.diego
Junior Member level 2

Hi to all! 
i have two doubts/problem about matrix:
1) if i have a matrix type declared as:
and i want to assign manually each value may i write:
with imL as a signal of type matrix?
2)if i want to read the values from a file may i use a multiple for loop? i want that all the values are ready befor the simulation of the unit under test starts!
obviously there is some error in both the examples but i don't know what is the right way to do it!
thanks a lot in advance
i have two doubts/problem about matrix:
1) if i have a matrix type declared as:
Code:
package matrici is
type matrixrow is array (4 downto 0) of std_logic_vector(8 downto 0);
type matrix is array (4 downto 0) of matrixrow;
end matrici;
and i want to assign manually each value may i write:
Code:
imL<= ( ("000000000","000000000","000000000","000000000","000000000"),
("000000000","000000000","000000000","000000000","000000000"),
("000000000","000000000","000000000","000000000","000000000"),
("000000000","000000000","000000000","000000000","000000000"),
("000000000","000000000","000000000","000000000","000000000") );
with imL as a signal of type matrix?
2)if i want to read the values from a file may i use a multiple for loop? i want that all the values are ready befor the simulation of the unit under test starts!
Code:
library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
USE IEEE.STD_LOGIC_TEXTIO.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE STD.TEXTIO.ALL;
package matrici is
type matrixrow is array (4 downto 0) of std_logic_vector(8 downto 0);
type matrix is array (4 downto 0) of matrixrow;
end matrici;
library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
USE IEEE.STD_LOGIC_TEXTIO.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE STD.TEXTIO.ALL;
USE work.matrici.all;
ENTITY sadTB IS
END sadTB;
ARCHITECTURE archsadTB OF sadTB IS
COMPONENT sad is
port ( R: in matrix;
C: in matrix;
sad: out std_logic_vector (12 downto 0) );
END COMPONENT;
SIGNAL pixel_in : std_logic_vector (9 DownTo 0) := "000000000";
signal imgR,imgL : matrix;
signal sadvalue : std_logic_vector (12 downto 0);
BEGIN
-- lettura file
variable inline:line;
variable pixel_integer : integer;
file in_file :text open read_mode is "./imageR.txt";
colonneR: for i IN 0 to 4 loop
righeR: for j IN 0 to 4 loop
READLINE(in_file, inline);
READ (inline ,pixel_integer);
pixel_in <= CONV_STD_LOGIC_VECTOR(pixel_integer, 9) ;
imgR(j)(i)<= pixel_in;
end loop;
end loop;
file in_file :text open read_mode is "./imageL.txt";
colonneL: for i IN 0 to 4 loop
righeL: for j IN 0 to 4 loop
READLINE(in_file, inline);
READ (inline ,pixel_integer);
pixel_in <= CONV_STD_LOGIC_VECTOR(pixel_integer, 9) ;
imgL(j)(i)<= pixel_in;
end loop;
end loop;
utt:sad port map (imgR,imgL,sadvalue);
END archsadTB;
obviously there is some error in both the examples but i don't know what is the right way to do it!
thanks a lot in advance
Last edited: