Re: Syncronous Resets
Perhaps a good book, like "Digital Design", by John F. Wakerly, can help you. In this book you can read the following:
For proper system operation, the hardware design of a state machine should ensure that it enters a known initial state on power-up. Most systems have a RESET signal that is asserted during power-up.
If a state machine is built using discrete flip-flops with asynchronous preset and clear inputs, the RESET signal can be applied to these inputs to force the machine into the desired initial state. If preset and clear inputs are not available, or if reset must be synchronous (as in systems using high-speed microprocessors), then the RESET signal may be used as another input to the state machine, with all of the nextstate entries going to the desired initial state when RESET is asserted.