Hi pseudockb,
I would recommend avoiding these lengths, and perhaps doing everything possible design wise to increase the current bias, even if only in one stage. Alternately you could investigate weak-inversion biasing. If you post some details of the design, we might be able to help.
Otherwise if you're stuck with this length, place dummy poly/diffusion on all sides of the devices to improve matching (at cost of area). Also be careful of the models for this transistor; most device engineers do not have a 1/50 device to measure, so all values are extrapolated and therefore less accurate. In addition, watch out for delta-w effects, RSCE (Reverse Short Channel Effect), and narrow width effects.
Regards,
Dipswitch