map report interpretation

[mersault]

Hello,

I read the map report but I'm a little confused with the utilization

Design Summary
--------------
Number of errors:      0
Number of warnings:    0
Logic Utilization:
  Number of Slice Flip Flops:           927 out of   9,312    9%
  Number of 4 input LUTs:               474 out of   9,312    5%
Logic Distribution:
  Number of occupied Slices:            624 out of   4,656   13%
    Number of Slices containing only related logic:     624 out of     624 100%
    Number of Slices containing unrelated logic:          0 out of     624   0%
      *See NOTES below for an explanation of the effects of unrelated logic.
  Total Number of 4 input LUTs:         474 out of   9,312    5%
  Number of bonded IOBs:                 25 out of     232   10%
  Number of BUFGMUXs:                     3 out of      24   12%

for example, in the report above, what is the real utilization?
9%?
what's the diference between utilization and distribution?

thank you

 

[dilinx]

I dont know which FPGA you are referring to..
In virtex5 there are 2 SLICEs in a CLBs and 4 LUTs, 4 FF and other logic per SLICE...
Slice Logic Utilization refers to total number of LUTs or FFs used by the design....
Slice Logic Distribution refers to total numbers of SLICEs used.....
There may be some unused LUTs or FFs in a used SLICE in implementation of your design. This makes these two ratios different...