Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

MAGMA : Flattening vs. Hierarchy Maintainence

Status
Not open for further replies.

hb_cancer

Member level 2
Joined
Jul 25, 2005
Messages
44
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,596
flattening hierarchy

Hi,
Can anyone tell me the difference between Flattening & Hierarchy Maintainence in Magma.... An example would be really useful... Thanks....
 

forget about magma for the moment. Maintaining hierarchy is to make sure all module in your designs are as they are while in flattening all modules are merged to make one module.

e.g.) if a verilog design consists of modules a, b, & c then hierarchy maintenace would mean all the three modules exist lets say after synthesis or any other transformation. While flattening would mean that the three modules are combined in synthesis or any other transformation to get one module.

Hope this helps.
 

There are two types of Flat vs. Hierarchical maintenance: logical and physical.

Logical flattening (as mentioned above) is when the synthesis tool flattens the logical hierarchy into one module.

For physical flattening, think of a hard block delivered to an SOC. The hard block is designed separately and would deliver various models for the SOC to integrate it (verilog, LEF/DEF, SPEF, .lib etc). The hard block would be maintained as a separate hierarchy within the SOC. If you wish to flatten this hierarchy you would need to merge the hard block DEF and verilog into the SOC level resulting on one flattened DEF and verilog for the whole design. The advantage of flattening a design is for simplicity (especially if you have several levels of hierarchy you are dealing with) but the disadvantage is that now any change to the logic in what use to be the hard block, will now require you to take the whole design through the flow and you will now have a much larger runtime.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top