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LVS error: psub-stampErrorMult" "psub-StampErrorConnect" "Wel-StampErrorMult"

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neeraj yadav

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LVS error: psub-stampErrorMult" "psub-StampErrorConnect" "Wel-StampErrorMult"

i am designing a layout of a circuit. when i do the LVS there is an error occurred "psub-stampErrorMult"
"psub-StampErrorConnect"
"Wel-StampErrorMult"
what is the exactly meaning of these error.
how i can remove these errors
 

Re: project related work

Neeraj,

Its probably because the P-type substrate must be connected to the 'gnd' & you need P-Diff contacts for that. And you should also connect the 'Vdd' with the N-Sub contact within the Nwell. Let me know if you face any further problems.. If you face any problem, capture a printscreen of the layout & I will be able to help you accurately..


i am designing a layout of a circuit. when i do the LVS there is an error occurred "psub-stampErrorMult"
"psub-StampErrorConnect"
"Wel-StampErrorMult"
what is the exactly meaning of these error.
how i can remove these errors
 

Re: project related work

Actually that is denoted that power net not yet connected with those gaurdrings or wrongly connected .
 

Re: project related work

... when i do the LVS there is an error occurred "psub-stampErrorMult"
"psub-StampErrorConnect"
"Wel-StampErrorMult"
what is the exactly meaning of these error.
how i can remove these errors

May be this thread might help you?
 

Re: project related work

Check for power connection to substrate...either its not connected or you have connected a wrong power..
 

Re: LVS error: psub-stampErrorMult" "psub-StampErrorConnect" "Wel-StampErrorMult"

can u check the power connections of the bulk,
generally, bulk connections can be made with in the cell or using well tie cells at regular intravels, check the connections of these well tie cells.

or if you have any floating std cells then also this issue will appear. check near the macro regions where plcament blockages are present;
 

Re: LVS error: psub-stampErrorMult" "psub-StampErrorConnect" "Wel-StampErrorMult"

i am designing a layout of a circuit. when i do the LVS there is an error occurred "psub-stampErrorMult"
"psub-StampErrorConnect"
"Wel-StampErrorMult"
what is the exactly meaning of these error.
how i can remove these errors

In my opinon, i think you can read the lvs commad file first to check the error's reason.
if you want to read it, you should use erc check for it or check soft-connect.
but i suggest you read the command file, that is the rigth method.
Maybe the file is wrong, or ....
so you should find the error's reason.
 

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