Sink0
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What's the intended data rate?Any sugestion of communication processor?
With a bus architecture, address decoding and data filtering in the hardware interface (as performed e.g. by CAN or Ethernet controllers) would be the key for high throughput, I think.
Hi,
What about HP`s G(bit)-Link pls?
http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=467775
Low Cost Gigabit Rate (High-Speed Serial Rate 150..1500MBaud) Transmit/Receive Chip Set with TTL I/Os:
http://www.datasheetcatalog.org/datasheet/hp/HDMP-1024.pdf
Its practically RT, has only a couple of bits header & Clk is transported as embebdded...
CAN or Ethernet are surly complexer to control & to end slower...
K.
Hali,Sink0 said:... There is an IC from Cypress called HotLink II that would be very useful but it cost 100 USD each piece. Too expensive.
Interesting, i could not find the IC on DIgiKey, farnell or Mouser... ANy idea where i can find it? The only problem is that the minimum speed is 150Mbps .. thats too high..Hi,
...Low Cost Gigabit Rate (High-Speed Serial Rate 150..1500MBaud) Transmit/Receive Chip Set with TTL I/Os:
http://www.datasheetcatalog.org/datasheet/hp/HDMP-1024.pdf ...
K.
Hali Sink0,
Check it pls by octopart; XSMicro has the old 1022/1024 too...
**broken link removed**
https://pdf1.alldatasheet.com/datasheet-pdf/view/113223/HP/HDMP-1032.html
K.
I also don't
actually understand, why a "user" would have to deal with the design details of a FPGA based interface as long as he's using
a predefined protocol scheme. The application dependant part can be still handled by a uP.
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