LTspice tolerance analysis

[ku637]

Hello i want to know if i can perform tolerance analysis with a third party subcircuit in LTspice.

E.g. say i have GCJ21BR71A106KE01L capacitor 10uF i want to apply tolerance, along with acutal model from the manufacturer duing simulation. Is it feasible?

 

[frankrose]

Applying tolerance is just setting a variable for value of an ideal capacitor. Capacitor model contain maybe an ESR and ESL, I don't understand why 3rd party model is required for this? Do you mean S-parameter file you want to simulate with LTSpice? That is not possible.

 

[FvM]

Murata is providing a SPICE ladder model for frequency dependent impedance, I presume an approximation of measured S-parameters. The datasheet only specifies a general tolerance of +/- 10%.

 

[stenzer]

Hi,

if only the capacitance is of interest you can vary its tolerance (±10%) and maybe DC biasing effects by the .step command. This allows a comparison with the ideal nominal values.

BR

 

[FvM]

DC biasing is actually the dominant effect for capacitance variation. But that's a large signal rather than tolerance problem.

 

[stenzer]

DC biasing is actually the dominant effect for capacitance variation. But that's a large signal rather than tolerance problem.

I agree, but as this effect is not considered by the Spice program, it should be taken into account if one is performing a tolerance analyis by means of the expected applied DC voltage. Especially as the DC biasing can have a more significant effect than the stated initial tolerance.

 

[Taihung]

Almost simulation design support, but with other name: AC/DC sweep.
In this case you can sweep any parameter. And output you will see multiple wave form with each parameter step level.
LTspice support this:

with LTspice is not easy to use this function, Psim is better.