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lt1115 opamp configuration question

yefj

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Hello, i need to use LT1115 opamp to be as close as possible to my goals which are 1MHz bandwidth 60dBv and stable.
I have tried to use it in integrator form but it low noise OPAMP so although i got my 60dBV and 1Mhz it was unstable.
Is there some recomended configuration i can use that could help me reach these goals?
Thanks.
 
Hello, i need to use LT1115 opamp to be as close as possible to my goals which are 1MHz bandwidth 60dBv and stable.
I have tried to use it in integrator form but it low noise OPAMP so although i got my 60dBV and 1Mhz it was unstable.
Is there some recomended configuration i can use that could help me reach these goals?
Thanks.
Read the data sheet:

GBW = 40MHz.

You're asking for GBW = 1000MHz

I suggest you use two stages.
 
Hi,

60 dBV? What does this mean?
I usually thought that it is +60dB with respect to 1V RMS, means 1000V RMS.
So dBV is a measure of voltage.

If you mean a gain of 60dB (without the "V"), then it means a gain of 1000. Unlikely to be unstable with a gain of 1000.

--> show your circuit. Complete, with values.
Also proper PCB layout and proper part selection is essential.

Klaus
 
Post a schematic of your configuration, including what you are using for bypass
caps on its supply pins, and its load.

Also post pics of your prototype.


Regards, Dana.
 
Last edited:
Hello , i have builts the following two stage based on the configuration in the link below.
configuration which gives me 60dB and 1Mhz asshown in step responce. but i get a weird frequency step responce,in general a stable stap responce i have pulse input and pulse shape output..but here i get only rise no fall.
Why i get only rise in the step responce,where did i go wrong?

https://www.ednasia.com/unique-compensation-technique-tames-high-bandwidth-voltage-feedback-op-amps/
1690518256785.png
1690518196926.png

1690518005632.png

1690517898915.png

--- Updated ---

Update : i changed to a similar opamp to LT1028 i got my desired 60dB gain and1Mhz BW.
but still i have little oscilations.
Is there a way i could fix a little those oscilation without ruining the gain and BW i got?
Thanks.

1690523380796.png


1690523112216.png


1690523492299.png


1690523519869.png
 
Last edited:
Hi,

(please don´t confuse us with a load of different informations. Please do it step by step)

I´m referencing to the first schematic of post#5:
* what is C2, C4 good for?
* do you understand that R5 feeds to two inverting (resulting in one non inverting) stages? Thus it´s no "negative" feedback, but "positive" feedback. Likely to stall (or oscillate).

Klaus
 
C2, C4 the comp technique from URL article OP posted.
Yes. I know.
But does the OP? And did he do the math behind it?
(posting a link is one thing, but doing the math correctly is a different thing)
Honestly, I didn´t do the math either, but 1nF seems to me too high...
(I might be wrong)

The next schematic shows two identical stages, but with different capacitance values for Cs. Does this make sense?

The last two schematics make way more sense. Lower Rf and lower Cs values.

***
Both OPs are not really very fast OPAMPs. I personally would choose a different one ... but I don´t know all the application requirements.

But I fully agree with the concerns about the proto board (PCB layout)

Klaus
 
Hello,Thank you for the help i changes the circuit, i got 668KHz BW 60dB gain and i think it a stable step responce :)
I'll be glad for your opinion if i could do better .
Thanks.
1690542212495.png

1690541691784.png
 
Hi,

I´ve used LT1028 before.
I guess you may reduce Cf to get higher bandwidth.
(you wanted 1MHz but now you are at 670kHz)

You may also play around with different gain: now if is about 32 * 32, but you may also try 40 * 25 for example.
It should give a benefit in noise and offset error .. and even may improve step response. Just try it.
(if you chane Rf then don´t forget to change Cf accordingly)

Klaus
 
Hello Klauss, the problem is with not GAIN and bandwidth,I am afraid regarding the oscilation issue.
I got a stable step responce with 1n rise and fallbut if i see how increasing BW makes the step responce with socilations.
In the simulation(the idial world)
I dont know what pitfall could be in real life that my circuit will oscilate altough my schematic simulation is ok.
Thanks.
 
Hi,

Correct me if I´m wrong:
* The simulation is O.K. now.
* the problem is with oscillation in real circuit.

If both are true: Then it´s a problem of your circuit. (most likely)
--> you need to show your circuit. (as already requested)

There are many possible pitfalls, like:
* non suitable GND plane
* non suitable power supply bypass capacitors
* Lenghty (high inductive, high capacitive) wiring
* unsuitable components (capacitors, resistors)
* measurement artefact
.....

Klaus

Btw: 1ns rise/ fall is not correct, it´s rather 1000ns.
 
Hello Klauss, i am sill working on the layout.
Is there a way i could predict the wiring problem you suggested?
Is there some simulation method i could use?
" Lenghty (high inductive, high capacitive) wiring"
 
Hi,

there are whole books discussing PCB layout goals, strategies.... So, do you want us to write all this down here in your thread? (I and others already did in similar threads)
With lot´s of guessing and unsuitable - for your design - informations.

Indeed every semiconductor manufacturer provides such informations, and additionally million other sources in the internet.

Or - again, again, again: show us what you did so far and you get detailed and focused assistance. In short time with lowest effort.

Klaus
 

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